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  9. Testability Design (DFT)

Testability Design (DFT)

Boards that can be tested efficiently save time and money in production. Designing for test is not optional for quality-critical programs.

  • Include test points for all critical nets — minimum 1mm Square, 1.5mm pitch for ICT probes
  • Place test points on the primary assembly side where possible
  • Avoid placing test points under BGA devices
  • Include a JTAG boundary scan header if microcontroller-intensive design
  • Document all test point net names in your assembly drawing
  • For functional test: provide connector pinouts and expected stimulus/response definitions